਍            唀匀䈀 ㌀⸀　 匀甀瀀攀爀猀瀀攀攀搀 倀䠀夀 吀攀猀琀 刀攀瀀漀爀琀ഀഀ

Overall Results:0 ਍漀昀ഀഀ 17 ਍       吀攀猀琀猀 䘀愀椀氀攀搀ഀഀ

Test Configuration Details
Device Description
Input File PathDevice 1
Input Signal TypeLive signal
Reference ClockSSC
De-emphasis Mode-3.5 dB
DeviceDevice
Device ID:Device 1
Test Session Details
Infiniium SW Version04.30.0004
Infiniium Model NumberDSO91304A
Infiniium Serial NumberMY51500106
Application SW Version1.42.9017
Debug Mode UsedNo
Compliance Limits (official)USB 3.0 Specification version 1.0
Probe (Channel 4) 
Last Test Date 

Summary of Results

Margin Thresholds
Warning< ਍                              ㈀ഀഀ %
Critical< ਍                              　ഀഀ %

Pass# Failed# TrialsTest NameActual ValueMarginSpec Range
01LFPS Peak-Peak Differential Output Voltage815.1 mV3.8 ਍─ഀഀ 800.0 mV <= VALUE <= 1.2000 V
01LFPS Period (tPeriod)39.8775 ns24.8 ਍─ഀഀ 20.0000 ns <= VALUE <= 100.0000 ns
01LFPS Burst Width (tBurst)1.0484 µs44.0 ਍─ഀഀ 600.0 ns <= VALUE <= 1.4000 µs
01LFPS Repeat Time Interval (tRepeat)10.0195 µs49.8 ਍─ഀഀ 6.0000 µs <= VALUE <= 14.0000 µs
01LFPS Rise Time242.0 ps94.0 ਍─ഀഀ VALUE <= 4.0000 ns
01LFPS Fall Time239.8 ps94.0 ਍─ഀഀ VALUE <= 4.0000 ns
01LFPS Duty cycle50.0172 %49.9 ਍─ഀഀ 40.0000 % <= VALUE <= 60.0000 %
01LFPS AC Common Mode Voltage45.0 mV55.0 ਍─ഀഀ VALUE <= 100.0 mV
01TSSC-Freq-Dev-Min-5.074122 kppm6.3 ਍─ഀഀ -5.300000 kppm <= VALUE <= -1.700000 kppm
01TSSC-Freq-Dev-Max80.006 ppm36.7 ਍─ഀഀ -300.000 ppm <= VALUE <= 300.000 ppm
01SSC Modulation Rate30.576810 kHz19.2 ਍─ഀഀ 30.000000 kHz <= VALUE <= 33.000000 kHz
01SSC Slew Rate5.596 ms44.0 ਍─ഀഀ VALUE <= 10.000 ms
01Far End Random Jitter (CTLE ON)93 mUI59.6 ਍─ഀഀ VALUE <= 230 mUI
01Far End Maximum Deterministic Jitter (CTLE ON)137 mUI68.1 ਍─ഀഀ VALUE <= 430 mUI
01Far End Total Jitter at BER-12 (CTLE ON)231 mUI65.0 ਍─ഀഀ VALUE <= 660 mUI
01Far End Template Test (CTLE ON)0.000100.0 ਍─ഀഀ VALUE = 0.000
01Far End Differential Output Voltage (CTLE ON)122.4 mV2.0 ਍─ഀഀ 100.0 mV <= VALUE <= 1.2000 V


Report Detail


LFPS Peak-Peak Differential Output Voltage ਍                    刀攀昀攀爀攀渀挀攀㨀ഀഀ USB 3.0 Specification, Rev 1.0, Section 6.9, Table 6-20
਍                      吀攀猀琀 匀甀洀洀愀爀礀㨀ഀഀ Pass ਍                     吀攀猀琀 䐀攀猀挀爀椀瀀琀椀漀渀㨀ഀഀ The purpose of this test is to verify that the peak-to-peak differential output voltage of the LFPS signal is within the conformance limits specified in Table 6-20 of the USB 3.0 Specification, version 1.0
Test Limits:[800.0 mV to 1.2000 V]LPFS PeakToPeakVoltage815.1 mV
Result Details:
Result Details
Num Bursts Processed5
LFPS Period (tPeriod) ਍                    刀攀昀攀爀攀渀挀攀㨀ഀഀ USB 3.0 Specification, Rev 1.0, Section 6.9, Table 6-20
਍                      吀攀猀琀 匀甀洀洀愀爀礀㨀ഀഀ Pass ਍                     吀攀猀琀 䐀攀猀挀爀椀瀀琀椀漀渀㨀ഀഀ The purpose of this test is to verify that the period of the LFPS signal is within the conformance limits specified in Table 6-20 of the USB 3.0 Specification, version 1.0
Test Limits:[20.0000 ns to 100.0000 ns]tPeriod39.8775 ns
Result Details:
Result Details
Num Bursts Processed5
LFPS Burst Width (tBurst) ਍                    刀攀昀攀爀攀渀挀攀㨀ഀഀ USB 3.0 Specification, Rev 1.0, Section 6.9, Table 6-21
਍                      吀攀猀琀 匀甀洀洀愀爀礀㨀ഀഀ Pass ਍                     吀攀猀琀 䐀攀猀挀爀椀瀀琀椀漀渀㨀ഀഀ The purpose of this test is to verify that the burst width (tBurst) of the Polling.LFPS signal is within the conformance limits specified in Table 6-21 of the USB 3.0 Specification, version 1.0
Test Limits:[600.0 ns to 1.4000 µs]tBurst1.0484 µs
Result Details:
Result Details
Num Bursts Processed5Burst Width Screen Capture(See image)
Trial 1
Trial 1: Burst Width Screen Capture

LFPS Repeat Time Interval (tRepeat) ਍                    刀攀昀攀爀攀渀挀攀㨀ഀഀ USB 3.0 Specification, Rev 1.0, Section 6.9, Table 6-21
਍                      吀攀猀琀 匀甀洀洀愀爀礀㨀ഀഀ Pass ਍                     吀攀猀琀 䐀攀猀挀爀椀瀀琀椀漀渀㨀ഀഀ The purpose of this test is to verify that the time interval when the next LFPS burst is transmitted (tRepeat) is within the conformance limits specified in Table 6-21 of the USB 3.0 Specification, version 1.0
Test Limits:[6.0000 µs to 14.0000 µs]tRepeat10.0195 µs
Result Details:
Result Details
Num Bursts Processed5Repeat Interval Screen Capture(See image)
Trial 1
Trial 1: Repeat Interval Screen Capture

LFPS Rise Time ਍                    刀攀昀攀爀攀渀挀攀㨀ഀഀ USB 3.0 Specification, Rev 1.0, Section 6.9, Table 6-20
਍                      吀攀猀琀 匀甀洀洀愀爀礀㨀ഀഀ Pass ਍                     吀攀猀琀 䐀攀猀挀爀椀瀀琀椀漀渀㨀ഀഀ The purpose of this test is to verify that the rise time of the LFPS signal is within the conformance limits specified in Table 6-20 of the USB 3.0 Specification, version 1.0
Test Limits:<= 4.0000 nsRise Time242.0 ps
Result Details:
Result Details
Num Bursts Processed5
LFPS Fall Time ਍                    刀攀昀攀爀攀渀挀攀㨀ഀഀ USB 3.0 Specification, Rev 1.0, Section 6.9, Table 6-20
਍                      吀攀猀琀 匀甀洀洀愀爀礀㨀ഀഀ Pass ਍                     吀攀猀琀 䐀攀猀挀爀椀瀀琀椀漀渀㨀ഀഀ The purpose of this test is to verify that the fall time of the LFPS signal is within the conformance limits specified in Table 6-20 of the USB 3.0 Specification, version 1.0
Test Limits:<= 4.0000 nsFall Time239.8 ps
Result Details:
Result Details
Num Bursts Processed5
LFPS Duty cycle ਍                    刀攀昀攀爀攀渀挀攀㨀ഀഀ USB 3.0 Specification, Rev 1.0, Section 6.9, Table 6-20
਍                      吀攀猀琀 匀甀洀洀愀爀礀㨀ഀഀ Pass ਍                     吀攀猀琀 䐀攀猀挀爀椀瀀琀椀漀渀㨀ഀഀ The purpose of this test is to verify that the duty cycle of the LFPS signal is within the conformance limits specified in Table 6-20 of the USB 3.0 Specification, version 1.0
Test Limits:[40.0000 % to 60.0000 %]Duty cycle (%)50.0172 %
Result Details:
Result Details
Num Bursts Processed5
LFPS AC Common Mode Voltage ਍                    刀攀昀攀爀攀渀挀攀㨀ഀഀ USB 3.0 Specification, Rev 1.0, Section 6.9, Table 6-20
਍                      吀攀猀琀 匀甀洀洀愀爀礀㨀ഀഀ Pass ਍                     吀攀猀琀 䐀攀猀挀爀椀瀀琀椀漀渀㨀ഀഀ The purpose of this test is to verify that the maximum voltage from Txp + Txn for both time and amplitude is within the limits as specified in Table 6-20 of the USB 3.0 specification
Test Limits:<= 100.0 mVAC Common Mode Voltage45.0 mV
Result Details:
Result Details

TSSC-Freq-Dev-Min ਍                    刀攀昀攀爀攀渀挀攀㨀ഀഀ USB 3.0 Specification, Rev 1.0, Section 6.5.3, Table 6-9
਍                      吀攀猀琀 匀甀洀洀愀爀礀㨀ഀഀ Pass ਍                     吀攀猀琀 䐀攀猀挀爀椀瀀琀椀漀渀㨀ഀഀ The purpose of this test is to verify that the measured SSC deviation is within the conformance limits specified in Table 6-9 of the USB 3.0 Specification.
Test Limits:[-5.300000 kppm to -1.700000 kppm]SSC Deviation (ppm)-5.074122 kppm
Result Details:
Result Details
Max UI (ppm)-4.999381 kppmMin UI (ppm)-5.074122 kppmSSC Profile(See image)
Trial 1
Trial 1: SSC Profile

TSSC-Freq-Dev-Max ਍                    刀攀昀攀爀攀渀挀攀㨀ഀഀ USB 3.0 Specification, Rev 1.0, Section 6.5.3, Table 6-9
਍                      吀攀猀琀 匀甀洀洀愀爀礀㨀ഀഀ Pass ਍                     吀攀猀琀 䐀攀猀挀爀椀瀀琀椀漀渀㨀ഀഀ The purpose of this test is to verify that the measured SSC deviation is within the conformance limits specified in Table 6-9 of the USB 3.0 Specification.
Test Limits:[-300.000 ppm to 300.000 ppm]Worst SSC Deviation (ppm)80.006 ppm
Result Details:
Result Details
Max UI (ppm)80.006 ppmMin UI (ppm)24.501 ppm
SSC Modulation Rate ਍                    刀攀昀攀爀攀渀挀攀㨀ഀഀ USB 3.0 Specification, Rev 1.0, Section 6.5.3, Table 6-9
਍                      吀攀猀琀 匀甀洀洀愀爀礀㨀ഀഀ Pass ਍                     吀攀猀琀 䐀攀猀挀爀椀瀀琀椀漀渀㨀ഀഀ The purpose of this test is to verify that the measured SSC modulation rate is within the conformance limits specified in Table 6-9 of the USB 3.0 Specification.
Test Limits:[30.000000 kHz to 33.000000 kHz]Modulation Rate (Hz)30.576810 kHz
Result Details:
Result Details
Modulation rate measurementSuccess
SSC Slew Rate ਍                    刀攀昀攀爀攀渀挀攀㨀ഀഀ USB 3.0 Specification, Rev 1.0, Section 6.7.1, Table 6-10
਍                      吀攀猀琀 匀甀洀洀愀爀礀㨀ഀഀ Pass ਍                     吀攀猀琀 䐀攀猀挀爀椀瀀琀椀漀渀㨀ഀഀ The purpose of this test is to ensure the combination of SSC and all other jitter sources within the bandwidth of the CDR must not exceed the allowed slew rate as listed in Table 6-10.
Test Limits:<= 10.000 msMax Slew Rate5.596 ms
Result Details:
Result Details
Slew Rate(See image)Min Phase-2.82 msMax Phase2.78 msTest PatternCP1
Trial 1
Trial 1: Slew Rate

Far End Random Jitter (CTLE ON) ਍                    刀攀昀攀爀攀渀挀攀㨀ഀഀ USB 3.0 Specification, Rev 1.0, Section 6.7.3, Table 6-12
਍                      吀攀猀琀 匀甀洀洀愀爀礀㨀ഀഀ Pass ਍                     吀攀猀琀 䐀攀猀挀爀椀瀀琀椀漀渀㨀ഀഀ The purpose of this test is to verify that the measured random jitter, Rj measured at TP1 is within the limits as specified in Table 6-12 of the USB 3.0 specification.
Test Limits:<= 230 mUIRJ93 mUI
Result Details:
Result Details
Total #UI Measured1.000000000 MRj_rms1.325 psTest PatternCP1De-embed SettingsEmbedEmbedded channel fileUSB3_TX_Device_Channel.tf4Test Waveform(See image)
Trial 1
Trial 1: Test Waveform

Far End Maximum Deterministic Jitter (CTLE ON) ਍                    刀攀昀攀爀攀渀挀攀㨀ഀഀ USB 3.0 Specification, Rev 1.0, Section 6.7.3, Table 6-12
਍                      吀攀猀琀 匀甀洀洀愀爀礀㨀ഀഀ Pass ਍                     吀攀猀琀 䐀攀猀挀爀椀瀀琀椀漀渀㨀ഀഀ The purpose of this test is to verify that the measured deterministic jitter, Dj measured at TP1 is within the limits as specified in Table 6-12 of the USB 3.0 specification.
Test Limits:<= 430 mUIDJ137 mUI
Result Details:
Result Details
Total #UI Measured1.000000000 MDJ_dd27.499 psRj_rms1.325 psTest PatternCP0De-embed SettingsEmbedEmbedded channel fileUSB3_TX_Device_Channel.tf4
Far End Total Jitter at BER-12 (CTLE ON) ਍                    刀攀昀攀爀攀渀挀攀㨀ഀഀ USB 3.0 Specification, Rev 1.0, Section 6.7.3, Table 6-12
਍                      吀攀猀琀 匀甀洀洀愀爀礀㨀ഀഀ Pass ਍                     吀攀猀琀 䐀攀猀挀爀椀瀀琀椀漀渀㨀ഀഀ The purpose of this test is to verify that the measured total jitter, Tj measured at TP1 is within the limits as specified in Table 6-12 of the USB 3.0 specification.
Test Limits:<= 660 mUITj at BER 10-12231 mUI
Result Details:
Result Details
Total #UI Measured1.000000000 MTj at BER 10-1246.142 psRj_rms(ps)1.325 psRj_rms(UI)7 mUIDJ_dd(ps)27.499 psDJ_dd(UI)137 mUIRJ Test PatternCP1DJ Test PatternCP0TJ EquationTJ = DJ(CP0) + 14.069 * RJrms(CP1)
Far End Template Test (CTLE ON) ਍                    刀攀昀攀爀攀渀挀攀㨀ഀഀ USB 3.0 Specification, Rev 1.0, Section 6.7.3, Table 6-12
਍                      吀攀猀琀 匀甀洀洀愀爀礀㨀ഀഀ Pass ਍                     吀攀猀琀 䐀攀猀挀爀椀瀀琀椀漀渀㨀ഀഀ The purpose of this test is to perform an eye mask test at TP1 using the eye mask template as specified in table 6-12 of the USB 3.0 specification.
Test Limits:= 0.000Eye Test0.000
Result Details:
Result Details
Total #UI Measured1.000000000 MNon-Transition Failures0.000Transition Failures0.000Non-Transition Eye Diagram(See image)Transition Eye Diagram(See image)Total Failures0.000NonTrans Max Voltage144 mNonTrans Min Voltage-144 mNonTrans Lower Margin Voltage29 mNonTrans Upper Margin Voltage29 mNonTrans Eye Height158 mTrans Max Voltage145 mTrans Min Voltage-144 mTrans Lower Margin Voltage10 mTrans Upper Margin Voltage12 mTrans Eye Height122 mTest PatternCP0De-embed SettingsEmbedEmbedded channel fileUSB3_TX_Device_Channel.tf4Pulsewidth_min_CP0388.960 psPulsewidth_max_CP01.610420 ns
Trial 1
Trial 1: Non-Transition Eye Diagram
Trial 1: Transition Eye Diagram

Far End Differential Output Voltage (CTLE ON) ਍                    刀攀昀攀爀攀渀挀攀㨀ഀഀ USB 3.0 Specification, Rev 1.0, Section 6.7.3, Table 6-12
਍                      吀攀猀琀 匀甀洀洀愀爀礀㨀ഀഀ Pass ਍                     吀攀猀琀 䐀攀猀挀爀椀瀀琀椀漀渀㨀ഀഀ The purpose of this test is to verify that the differential output voltage measured at TP1 meets the minimum eye height as specified in Table 6-12 of the USB 3.0 specification.
Test Limits:[100.0 mV to 1.2000 V]PeakToPeakVoltage122.4 mV
Result Details:
Result Details
Total #UI Measured1.000000000 MMax. Voltage144.9 mVMin. Voltage-144.1 mVMax. Non Transition Eye Voltage143.9 mVMin. Non Transition Eye Voltage-143.8 mVMin. Transition Eye Voltage Margin Above Eye11.9 mVMin. Transition Eye Voltage Margin Below Eye10.5 mVMin. Non Transition Eye Voltage Margin Above Eye28.7 mVMin. Non Transition Eye Voltage Margin Below Eye29.0 mVTest PatternCP0